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Bluespec has two product lines. Primarily for ASIC and FPGA hardware designers and architects, Bluespec is delivering SystemVerilog-based ESL synthesis with no compromise (speed and area) RTL. Bluespec is the only ESL synthesis solution for control logic, complex datapaths and algorithms. For SystemC users, Bluespec has delivered high-level ESL Synthesis abstractions to SystemC.Bluespec presents the hardware designer an exciting new way to implement a design with correct-by-construction control logic synthesis while retaining full control over the architecture and performance of the design. The toolset allows ASIC and FPGA designers to significantly reduce design time, bugs and re-spins that contribute to product delays and escalating costs. Bluespec integrates seamlessly into Cadence, Synopsys, Mentor and Magma flows, including verification, debug and synthesis, without requiring new methodologies or tools.
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