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Description
The new options for the TLA6000 Series consists of a set of tools designed to provide visibility to all address, data, and control signals.
Memory chip interposers that provide a convenient way of probing embedded DDR memory systems and eliminates the need to design in probe access points. These memory chip interposers work with the unique iCapture Analog Mux feature of the TLA6000 to provide a single probing solution for both the logic analyzer and oscilloscope, saving time and minimizing setup complexity.
DDR2 memory systems are used in many of today's embedded designs - commonly implemented as a bus on the microprocessor or as a block in an FPGA. The complexity of the DDR2 protocol and the number of command/data/address signals make it difficult to both visualize the operation of the bus and to isolate any potential problems. In addition, designers need to ensure that signal timing and interfaces comply with JEDEC standards. The new DDR2 options for the TLA6000 Series meet the emerging need for a more complete, easier to user DDR2 test solution at a more affordable price point.